Construction and test of the first Belle II SVD ladder implementing the origami chip-on-sensor design
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Date
2016
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Abstract
The Belle II Silicon Vertex Detector comprises four layers of double-sided silicon strip detectors (DSSDs), consisting of ladders with two to five sensors each. All sensors are individually read out by APV25 chips with the Origami chip-on-sensor concept for the central DSSDs of the ladders. The chips sit on flexible circuits that are glued on the top of the sensors. This concept allows a low material budget and an efficient cooling of the chips by a single pipe per ladder. We present the construction of the first SVD ladders and results from precision measurements and electrical tests. � 2016 IOP Publishing Ltd and Sissa Medialab srl.
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Data acquisition concepts, Detector design and construction technologies and materials, Electronic detector readout concepts (solid-state), Front-end electronics for detector readout
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5