Construction and test of the first Belle II SVD ladder implementing the origami chip-on-sensor design

dc.contributor.authorIrmler C.en_US
dc.contributor.authorAdamczyk K.en_US
dc.contributor.authorAihara H.en_US
dc.contributor.authorAngelini C.en_US
dc.contributor.authorAziz T.en_US
dc.contributor.authorBabu V.en_US
dc.contributor.authorBacher S.en_US
dc.contributor.authorBahinipati S.en_US
dc.contributor.authorBarberio E.en_US
dc.contributor.authorBaroncelli T.en_US
dc.contributor.authorBaroncelli T.en_US
dc.contributor.authorBasith A.K.en_US
dc.contributor.authorBatignani G.en_US
dc.contributor.authorBauer A.en_US
dc.contributor.authorBehera P.K.en_US
dc.contributor.authorBergauer T.en_US
dc.contributor.authorBettarini S.en_US
dc.contributor.authorBhuyan B.en_US
dc.contributor.authorBilka T.en_US
dc.contributor.authorBosi F.en_US
dc.contributor.authorBosisio L.en_US
dc.contributor.authorBozek A.en_US
dc.contributor.authorBuchsteiner F.en_US
dc.contributor.authorCasarosa G.en_US
dc.contributor.authorCeccanti M.en_US
dc.contributor.author?ervenkov D.en_US
dc.contributor.authorChendvankar S.R.en_US
dc.contributor.authorDash N.en_US
dc.contributor.authorDivekar S.T.en_US
dc.contributor.authorDole�al Z.en_US
dc.contributor.authorDutta D.en_US
dc.contributor.authorForti F.en_US
dc.contributor.authorFriedl M.en_US
dc.contributor.authorFr�hwirth R.en_US
dc.contributor.authorHara K.en_US
dc.contributor.authorHiguchi T.en_US
dc.contributor.authorHoriguchi T.en_US
dc.contributor.authorIshikawa A.en_US
dc.contributor.authorJeon H.B.en_US
dc.contributor.authorJoo C.en_US
dc.contributor.authorKandra J.en_US
dc.contributor.authorKang K.H.en_US
dc.contributor.authorKato E.en_US
dc.contributor.authorKawasaki T.en_US
dc.contributor.authorKody� P.en_US
dc.contributor.authorKohriki T.en_US
dc.contributor.authorKoike S.en_US
dc.contributor.authorKolwalkar M.M.en_US
dc.contributor.authorKvasni?ka P.en_US
dc.contributor.authorLanceri L.en_US
dc.contributor.authorLettenbicher J.en_US
dc.contributor.authorMaki M.en_US
dc.contributor.authorMammini P.en_US
dc.contributor.authorMayekar S.N.en_US
dc.contributor.authorMohanty G.B.en_US
dc.contributor.authorMohanty S.en_US
dc.contributor.authorMorii T.en_US
dc.contributor.authorNakamura K.R.en_US
dc.contributor.authorNatkaniec Z.en_US
dc.contributor.authorNegishi K.en_US
dc.contributor.authorNisar N.K.en_US
dc.contributor.authorOnuki Y.en_US
dc.contributor.authorOstrowicz W.en_US
dc.contributor.authorPaladino A.en_US
dc.contributor.authorPaoloni E.en_US
dc.contributor.authorPark H.en_US
dc.contributor.authorPilo F.en_US
dc.contributor.authorProfeti A.en_US
dc.contributor.authorRao K.K.en_US
dc.contributor.authorRashevskaia I.en_US
dc.contributor.authorRizzo G.en_US
dc.contributor.authorRozanska M.en_US
dc.contributor.authorSandilya S.en_US
dc.contributor.authorSasaki J.en_US
dc.contributor.authorSato N.en_US
dc.contributor.authorSchultschik S.en_US
dc.contributor.authorSchwanda C.en_US
dc.contributor.authorSeino Y.en_US
dc.contributor.authorShimizu N.en_US
dc.contributor.authorStypula J.en_US
dc.contributor.authorSuzuki J.en_US
dc.contributor.authorTanaka S.en_US
dc.contributor.authorTanida K.en_US
dc.contributor.authorTaylor G.N.en_US
dc.contributor.authorThalmeier R.en_US
dc.contributor.authorThomas R.en_US
dc.contributor.authorTsuboyama T.en_US
dc.contributor.authorUozumi S.en_US
dc.contributor.authorUrquijo P.en_US
dc.contributor.authorVitale L.en_US
dc.contributor.authorVolpi M.en_US
dc.contributor.authorWatanuki S.en_US
dc.contributor.authorWatson I.J.en_US
dc.contributor.authorWebb J.en_US
dc.contributor.authorWiechczynski J.en_US
dc.contributor.authorWilliams S.en_US
dc.contributor.authorW�rkner B.en_US
dc.contributor.authorYamamoto H.en_US
dc.contributor.authorYin H.en_US
dc.contributor.authorYoshinobu T.en_US
dc.date.accessioned2025-02-17T05:41:27Z
dc.date.issued2016
dc.description.abstractThe Belle II Silicon Vertex Detector comprises four layers of double-sided silicon strip detectors (DSSDs), consisting of ladders with two to five sensors each. All sensors are individually read out by APV25 chips with the Origami chip-on-sensor concept for the central DSSDs of the ladders. The chips sit on flexible circuits that are glued on the top of the sensors. This concept allows a low material budget and an efficient cooling of the chips by a single pipe per ladder. We present the construction of the first SVD ladders and results from precision measurements and electrical tests. � 2016 IOP Publishing Ltd and Sissa Medialab srl.en_US
dc.identifier.citation5en_US
dc.identifier.urihttp://dx.doi.org/10.1088/1748-0221/11/01/C01087
dc.identifier.urihttps://idr.iitbbs.ac.in/handle/2008/1127
dc.language.isoenen_US
dc.subjectData acquisition conceptsen_US
dc.subjectDetector design and construction technologies and materialsen_US
dc.subjectElectronic detector readout concepts (solid-state)en_US
dc.subjectFront-end electronics for detector readouten_US
dc.titleConstruction and test of the first Belle II SVD ladder implementing the origami chip-on-sensor designen_US
dc.typeConference Paperen_US

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