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A 0.186 pJ/bit, 6-Gb/s, Energy-Efficient, Half-Rate Hybrid Circuit Topology in 1.2V, 65 nm CMOS
(2024) Govindaswamy P.K.; Khatun M.; Pasupureddi V.S.
The traditional hybrid circuit topologies in full-duplex(FD) communication suffer from low-eye opening and high static power consumption at high data rates. In addition, they require gain-stages and sense-amplifier circuit topologies in the receiver path to produce the received signal with rail-to-rail voltage signal swing. As a result, the overall power-budget of the FD transceivers increases due to multiple blocks in the receiver signal path. Hence, the energy-efficiency of the transceiver becomes poor at the cost of increased circuit complexity. To address this issue, in this work, the authors propose a half-rate double tail latch comparator based hybrid (HR-DTLCH) circuit topology deployed at the receiver front-end of the FD transceiver to separate received signal from signal on the interconnect. The proposed DTLCH circuit topology provides strong digital equalization to the received signal at the receiver front-end without need for any power-hungry post signal processing circuitry. The proposed hybrid is designed in 1.2 V, 65 nm CMOS at 6-Gb/s FD data rate over 20 cm FR4-PCB chip-to-chip interconnect. The post-layout simulation results show that the proposed DTLCH circuit topology has power consumption of only 0.56 mW with an energy-efficiency of 0.186 pJ/b at 6-Gb/s FD operation. The final received signal has rail-to-rail output voltage swing with timing jitter of 9 ps. The layout of the DTLCH circuit topology occupies an area of 0.0097 mm2 � 2024 IEEE.
A 0.2 pJ/bit, Energy-Efficient, Half-Rate Hybrid Circuit Topology at 6-Gb/s in 1.2V, 65 nm CMOS
(2024) Govindaswamy P.K.; Khatun M.; Pasupureddi V.S.
The conventional power-hungry current and voltage-mode hybrid circuit topologies are not suitable for full-duplex(FD) front-end receivers, and they are not directly compatible with modern digital signal processing (DSP) cores as they suffer from low output differential eye-opening at high data rates. Moreover, they require extensive equalization and post-amplifier circuits to improve the eye-opening of the received signal at the cost of an additional power penalty and the increased circuit complexity. As a result, the overall energy-efficiency of the transceiver circuit becomes poor. To address this issue, in this work, the authors propose a half-rate StrongArm latch comparator based hybrid(HR-SALCH) for FD signaling over off-chip interconnect. The StrongArm latch comparator(SALC) circuit topology has the advantages of rail-to-rail voltage swing, digital equalization, and low static power dissipation and hence it is suitable candidate for realizing an energy-efficient receiver front-end hybrid circuit in FD off-chip communication. The proposed StrongArm latch comparator based hybrid(SALCH) is designed in 1.2 V, 65 nm CMOS at 6-Gb/s FD data rate over FR4-PCB interconnect of length 20 cm. The post-layout simulation results show that the proposed full-duplex transceiver deploying SALCH circuit topology has rail-to-rail output voltage swing with the timing jitter of 11 ps. The power consumption of the SALCH circuit topology is only 0.62 mW with an energy efficiency of 0.2 pJ/b at 6-Gb/s full-duplex operation. � 2024 IEEE.
0.4-1 GHz Subsampling Mixer-First RF Front-End With 50-dB HRR, +10-dBm IB-IIP3 in 65-nm CMOS
(2023) Rena R.V.; Kammari R.; Vijay Shankar P.
Reconfigurable subsampling mixer-first RF front-end is a potential candidate for low-power applications as it operates at a low clock frequency and hence consumes low power. However, the subsampling down-conversion has not been employed in mixer-first RF front-ends due to the disadvantage of high noise figure from inherent noise folding and lack of RF port impedance matching because of nonzero IF down-conversion. To address the above two issues, first, a subsampling multipath down-conversion mixer scheme is proposed for rejecting 3fs/4 and 5fs/4 down-conversions, thereby alleviating the effect of noise folding, leading to low noise figure. Second, an IF-stage impedance matching scheme is proposed that provides 50 matching at the RF port of the mixer using an IF-LNA in shunt with an M -phase switch-capacitor filter. The analysis of the proposed scheme in terms of noise figure, conversion gain, and harmonic rejection is presented. The proposed subsampling mixer-first RF front-end is implemented in 1.2 V, 65-nm CMOS technology. The prototype occupies an active area of 0.33 mm2, the switch-capacitor mixer and M -phase filter consume 400W of power, and IF amplifier and nonoverlapping clock generation circuit consume 25 mW and 6-12.6 mW of power, respectively. The RF front-end achieves a 6.5-dB noise figure, 15.1-dB conversion gain, 50-dB harmonic rejection ratio (HRR), and +10-dBm IB-IIP3. � 1993-2012 IEEE.
A 0.4-1.8-GHz Quarter-Rate Subsampling Mixer-First Direct Down-Conversion RF Front-End
(2024) Rena R.V.; Kammari R.; Pasupureddi V.S.
Subsampling down-conversion has not been a popular choice for mixer-first RF front-ends for two interdependent reasons. One, the subsampling down-conversion is inherently heterodyne in nature. Two, as a consequence to one, the passive mixer transparency property can not be exploited for providing impedance matching at the RF port by impedance translation. In this work, an eight-path quarter-rate subsampling (QRSS) mixer-first direct down-conversion architecture is proposed to address these issues. The proposed architecture simultaneously achieves quadrature direct down-conversion and impedance matching by using the third harmonic of the QRSS frequency, f_{s}. The impedance matching is achieved by exploiting the eight-path passive mixer transparency property. Compared to RF sampling receivers, this architecture employs a sampling frequency f_{s} three times lesser than f_{\text {RF}} , saving on the power consumption of nonoverlapping clock generation, distribution circuits, and frequency synthesizer. A test chip is fabricated in 1.2-V, 65-nm CMOS with an active area of 0.32 mm2. The subsampling eight-path mixer, baseband low-noise amplifier (LNA), and {\text{g}_{m}} -cell consume a power of 800 \mu \text{W} , 23 mW, and 3 mW, respectively, for a target bandwidth of 90 MHz. Nonoverlapping clock generation circuit consumes 2-9.2 mW, over the band 0.4-1.8 GHz. The receiver has a double sideband (DSB) noise figure of 4.7 dB, a conversion gain of 22 dB, an in-band (IB)-IIP3 of -1 dBm, and OB-IIP3 of +8 dBm. � 1993-2012 IEEE.
A 1.2 V Double-Tail StrongARM Latch Comparator with 51 fJ/comparison and 380 ?V Input Noise in 65 nm CMOS Technology
(2024) Maram S.R.; Boyapati S.; Pasupureddi V.S.
This paper presents an energy-efficient double-tail StrongARM latch (DTSAL) comparator for Internet of Things (IoT) applications, particularly operated with inadequate battery power. The low energy efficiency in the conventional DTSAL comparator is due to the discharge of the preamplifier output nodes even after the latch evaluation is completed. However, the existing solutions improved the energy efficiency of the DTSAL comparator with a degraded performance in either clock-to-output delay or in input-referred noise voltage. The proposed idea is to provide a high energy efficiency with adequate noise reduction by maintaining the same clock-to-output delay. The high energy efficiency is achieved with an incomplete discharge of the preamplifier output nodes by using additional transistors along with the tail transistor. These additional transistors are driven by the preamplifier output nodes and complemented outputs of the latch stage. The proposed DTSAL comparator is implemented in 65 nm CMOS process with 1.2 V supply voltage. The proposed DTSAL comparator achieves 51 fJ energy per comparison, a clock-to-output delay of 680 ps, and an input-referred noise voltage of 380 ?V. The proposed DTSAL comparator provides an improvement of 42% in energy reduction and 48% improvement in the figure of merit over the conventional DTSAL comparator. � 2024 IEEE.
A 15-Gb/s, 0.036 pJ/bit, Half-Rate, Low Power PRBS Generator in 1.2 V, 65 nm CMOS
(2024) Ravibabu P.; Govindaswamy P.K.; Pasupureddi V.S.
This work proposes a 27-1, low power, half-rate, StrongArm latch based pseudo-random bit sequence (SAL-PRBS) generator at a 15-Gb/s data rate. The proposed SAL-PRBS consumes low static-power consumption compared to current-mode logic (CML) based PRBS circuit topologies, thanks to the StrongArm latch (SAL) comparator circuit topology having virtually zero static power consumption. The proposed design is implemented in 1.2 V, 65 nm CMOS. The simulation results show that the SAL-PRBS consumes only 3.7 mW at a 15-Gb/s data rate. The output data sequence of SAL-PRBS has rail-to-rail output voltage signal swing with a timing jitter of 2 ps. The figure-of-merit(FoM) of the proposed SAL-PRBS generator is only 0.036-pJ/bit at a 15-Gb/s data rate. � 2024 IEEE.
150 km long distributed temperature sensor using phase modulated probe wave and optimization technique
(2014) Pradhan H.S.; Sahu P.K.
This paper describes and demonstrates the performance enhancement of a 150 km distributed sensing system based on Brillouin optical time-domain analysis (BOTDA). We present a BOTDA system combining the phase modulation and global evolutionary computing based optimization technique (Differential Evolution algorithm (DE)) for receiver optimization. We achieved an SNR improvement of 3.3 dBm compared to amplitude modulated probe wave for 150 km sensing range. We successfully demonstrate the presence of hot spot at a distance of 51 km of the sensing fibre for different temperatures. � 2013 Elsevier GmbH.
A 2 7 -1, 20-Gb/s, Low-Power, Charge-Steering Half-Rate PRBS Generator in 1.2�V, 65�nm CMOS
(2021) Govindaswamy P.K.; Pasupureddi V.S.R.
In this work, we propose a 27-1, 20-Gb/s, low-power, charge-steering, half-rate pseudorandom bit sequence (PRBS) generator in 1.2 V, 65 nm CMOS. At the target data rate, the proposed charge-steering implementation has the lowest power consumption of 0.2 mW/Gb/s compared to the current-mode PRBS generator implementations, thanks to the discrete nature of the charge-steering latch circuit topology, which consumes a power of 22.3 ? W/Gb/s, whereas the CML latch consumes 60 ? W/Gb/s. The post-layout performance of the implementation shows a differential output voltage swing of 1.5 V, timing jitter of 5 ps and figure of merit of 0.038-pJ/bit at 20-Gb/s and it occupies an area of 0.026 mm 2. Thus, the proposed power efficient charge-steering half-rate PRBS generator implementation is an attractive candidate for on-chip bit-error-rate test and measurement applications. � 2021, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.
A 27-1, 20-Gb/s, 0.1-pJ/b Pseudo Random Bit Sequence Generator Using Incomplete Settling in 1.2V, 65 nm CMOS
(2024) Govindaswamy P.K.; Khatun M.; Pasupureddi V.S.
The conventional current-mode pseudo-random bit sequence (PRBS) generators suffer from high-power consumption, low output voltage swing and they are not directly compatible with the CMOS static logic circuit. To address this issue, this work proposes power-efficient, 27-1, 20-Gb/s, half-rate pseudo-random bit sequence(HR-PRBS) generators by employing current-integrating latch circuit topology using incomplete settling at 20-Gb/s data rate implemented in 1.2 V, 65 nm CMOS. The proposed current-integrating logic latch based PRBS implementations achieves low power consumption, high speed and high voltage swing thanks to incomplete settling behaviour of the CIL circuit topology. The proposed PRBS generator implementations employing current-integrating latch topology consumes power of 0.76-mW/Gb/s while operating at 20-Gb/s data rate. The differential eye-opening of the proposed current-integrating logic (CIL) HR-PRBS generator is 1.6 V at 20-Gb/s date rate. � 2024 IEEE.
A 2D model for prediction of nanoparticle distribution and microstructure evolution during solidification of metal matrix nanocomposites
(2021) Jegatheesan M.; Bhattacharya A.
A 2D numerical model to predict the microstructure evolution in binary alloy matrix nanocomposites is presented. The main novelty of the model is that it captures the effect of nanoparticles on binary alloy dendrite growth and microstructure evolution. Diffusion based transport of nanoparticles is solved using a nanoparticle concentration defined in a similar way to an alloying element. Engulfment or rejection of nanoparticles at the solidification interface is implemented by defining a partition coefficient. The diffusivity of nanoparticles is calculated based on nanoparticlemovement due to Brownian motion. The governing equations for binary alloy solidification are formulated using the volume averaged enthalpy method with a probabilistic nucleation model for grain nucleation. The effect of nanoparticles on solidification is incorporated through modifications of the solute diffusion field and interfacial energy. The developed model is used for predicting the effect of nanoparticle concentration and nanoparticle radius on dendrite growth and microstructure evolution. From single dendrite study, it is observed that the dendrite size decreases with increase in nanoparticle concentration while it increases with increase in nanoparticle radius. During microstructure evolution, increased non-homogeneity in nanoparticle distribution is observed with increase in nanoparticle concentration and more uniform distribution is observed with increase in nanoparticle radius. � 2021 IOP Publishing Ltd.
3-D Deployment and Trajectory Planning for Relay Based UAV Assisted Cooperative Communication for Emergency Scenarios Using Dijkstra's Algorithm
(2023) Prasad N.L.; Ramkumar B.
In this work, a relay-based UAV-assisted cooperative communication for emergency applications is proposed for rural and semi-urban scenarios. 3-D deployment of multiple UAVs is resolved by jointly optimizing the height and transmit power of cluster UAVs and the optimal trajectory of relay UAVs is perfected by using the graph theory approach. While the majority of works in literature use UAVs as aerial base stations or as relays, this paper proposes to use UAVs as both relays and aerial base stations. Furthermore, this is one of the few works where UAVs are used as both static base stations (cluster UAVs) and mobile base stations (relay UAVs). The proposed 3-D deployment and trajectory planning algorithm is implemented at the ground base station (GBS) and the resultant parameters will be distributed to cluster UAVs either directly or through relay UAVs. A four-step approach is proposed to solve the 2-D location coordinates of cluster UAVs, to find the location of the GBS, the power-height optimization of cluster UAVs, and to optimize the trajectory of relay UAVs. The number of users served, channel capacity achieved, power saved due to optimal deployment, latency reduced, and power saving by optimal trajectory are some of the performance metrics used to evaluate the proposed algorithms. The simulation results are validated to show that the proposed solutions outperform existing similar approaches. � 1967-2012 IEEE.
3.51 Ga old felsic volcanic rocks and carbonaceous cherts from the Gorumahisani Greenstone Belt � Insights into the Palaeoarchaean record of the Singhbhum Craton, India
(2021) Jodder J.; Hofmann A.; Ueckermann H.
In the Singhbhum Craton of India, Palaeoarchaean greenstone sequences have so far been reported from the south of the craton. In this study, we report a precise 3510 � 3 Ma U-Pb LA-ICP-MS zircon age from a well-preserved felsic volcaniclastic unit of the Gorumahisani Greenstone Belt (GGB) exposed in the north-eastern part of the craton. The volcano-sedimentary sequence of the GGB comprises a typical Palaeoarchaean greenstone succession of submarine ultramafic to felsic volcanic rocks intercalated with banded iron formation and abundant carbonaceous chert. Chert of the GGB comprises banded black-and-white chert, granular chert, laminated chert and massive black chert, in striking similarity to Palaeoarchaean greenstone successions in South Africa and Australia. Raman spectroscopy of carbonaceous matter yielded an average of ~460 �C as an estimate for the peak metamorphic temperature in the study area. The good preservation and only greenschist-facies metamorphic conditions make the GGB an interesting target for Early Earth studies. � 2021 Elsevier B.V.
3.6-pJ/Spike, 30-Hz Silicon Neuron Circuit in 0.5-V, 65-nm CMOS for Spiking Neural Networks
(2024) Vuppunuthala S.; Pasupureddi V.S.
In large-scale neuromorphic systems, a spiking neural network (SNN) provides a promising solution for energy-efficient computing. Optimizing SNN building blocks like neurons and synapses can further enhance computing efficiency. Due to their simplicity and computational efficiency, integrate-and-fire neuron (I&F) models are widely used in SNNs. In the past proposals of I&F neuron models, the main issue is the short-circuit currents in CMOS inverters, which significantly inhibit the circuit's optimal performance and energy efficiency. This brief presents an energy-efficient differential-pair integrator (DPI) based I&F silicon neuron (SiN) circuit by utilizing the subthreshold source-coupled logic (STSCL) circuit topology as a replacement for CMOS inverters and incorporating a low supply voltage to mitigate leakage currents effectively. The proposed SiN is implemented in 65 nm CMOS technology with a supply voltage of 0.5-V and has an energy consumption of 3.6 pJ/spike with a spiking frequency (rate) of 30 Hz. � 2004-2012 IEEE.
3D cuboidal vanadium diselenide embedded reduced graphene oxide hybrid structures with enhanced supercapacitor properties
(2017) MarriThese Authors Contributed Equally. S.R.; Ratha S.; Rout C.S.; Behera J.N.
The electrochemical supercapacitor performance of a VSe2-reduced graphene oxide (RGO) hybrid has been reported for the first time. The hybrid was synthesized via a one-step hydrothermal route at different concentrations of graphene oxide, i.e. 0.15, 0.3, and 0.75 wt%. Enhanced supercapacitor performances were observed in the case of the hybrid obtained at 0.3 wt% of GO. It showed a specific capacitance of ?680 F g-1 at a mass normalised current of 1 A g-1 which was ?6 and ?5 fold higher than those of bare VSe2 and bare RGO, respectively. Furthermore, a high energy density of ?212 W h kg-1, power density of ?3.3 kW kg-1, and ?81% retention of the initial capacitance even after 10?000 cycles of charge-discharge were observed. � The Royal Society of Chemistry.
3D FE adhesion failure analyses of adhesive bonded single lap joint made with functionally modulus graded curved adherends
(2024) Parida S.K.; Murmu A.M.; Hari V.; Ayar V.S.; Das R.
Adhesive bonded Single Lap joints (SLJ) are used to make several larger structures of several industries, including (aerospace and marine) by joining smaller laminated FRP composite panels. The Single Lap JointJ, due to its inherent overlapping geometry, possesses an eccentric load transfer path when subjected to tensile loading. The coupling of differential straining, bending, twisting and tension phenomenon induces out-of-plain peel, in-plane longitudinal shear and transverse shear stresses near the overlap ends. A small adhesion failure may be pre-existing or may onset from a vulnerable location in the Single Lap Joint. The propagation rate of this adhesion failure decides whether the jointed structure will fail slowly or catastrophically during loading. A three-dimensional adhesion failure analysis in the Single Lap Joint made with functionally modulus-graded curved adherends under uniformly applied tension is presented in this article. The peel and shear stresses in the bond line interfaces have been evaluated for different compositional gradient exponents of the material of adherends using the no-linear finite element method. The effects of the adhesion failure lengths and compositional gradient exponents on the opening, sliding and strain energy release rate (SERR) corresponding to have been evaluated to predict the structural integrity of the SLJ. The structural integrity and, hence, the service life of the adhesive-bonded single lap joint can be enhanced by the functionally graded modulus of the adherends to reduce the magnitudes of peel and shear stresses in the vicinity of the overlap ends. � The Author(s), under exclusive licence to Springer-Verlag France SAS, part of Springer Nature 2024.
3D FE delamination induced damage analyses of adhesive bonded lap shear joints made with curved laminated FRP composite panels
(2013) Pradhan A.K.; Parida S.K.
This paper deals with the evaluation of inter-laminar stresses in the adhesive layer existing between the lap and the strap adherends of lap shear joints (LSJ) made with curved laminated fibre reinforced plastic (FRP) composite panels for varied embedded delaminations between the first and second plies of the strap adherend. Non-linear finite element analyses have been carried out using contact and multi point constraint (MPC) elements. The use of contact elements ensures avoidance of inter-penetration of delaminated surfaces. Sequential release of MPC elements facilitates computation of individual modes of Strain Energy Release Rates (SERR). The effects of varied delamination lengths on variations of peel and inter-laminar shear stresses and different modes of SERR are seen to be very significant. Their variations on both the delamination fronts, for each size of the delamination, are found to be much different from each other indicating different propagation rates at the two delamination fronts. The structural integrity of the LSJ in the presence of delaminations, thus, can be predicted with adaptive finite element (FE) simulations. It is further seen that the peak stress magnitudes and SERRs are higher in the LSJs made with curved FRP composite panels as compared to the flat laminates. This may be due to the stiffening effects induced by the curvature geometry of the curved composite panels. � 2012 Taylor & Francis.
3D Modeling of Long-Term Dynamic Behavior of Monopile-Supported Offshore Wind Turbine in Clay
(2019) Bisoi S.; Haldar S.
This article outlines the long-term dynamic behavior of the monopile-supported offshore wind turbine (OWT) in clay. A three-dimensional (3D) finite-element (FE) model was developed that uses viscoelastic material constitutive models for soils in conjunction with stiffness-degradation functions to examine the long-term behavior of monopile-supported OWTs subjected to transient loading. The proposed numerical model was validated by experimental results and recorded data from real offshore wind turbines. Effects of amplitudes of wind and wave loads and their frequency, monopile length and diameter, and rotor-nacelle assemble (RNA) mass on the long-term dynamic behavior of a 5-MW OWT due to different load cycles were studied. The results show that the effect of wind load governs the design and that monopile diameter has a significant role in the long-term behavior of the structure. � 2019 American Society of Civil Engineers.
A 3D pore-scale model for macro-encapsulated phase change material-metal foam hybrid energy storage system
(2023) Das S.; Athawale V.; Joy J.M.; Jegatheesan M.; Rath P.; Bhattacharya A.
A 3D pore-scale model is presented to predict the energy storage characteristics of a macro-encapsulated phase change material (PCM)-metal foam hybrid energy storage system. A single capsule with metallic shell filled with PCM-metal foam composite is considered. The energy transfer from a heat transfer fluid (HTF) flowing over the capsule, the evolution of temperature, and the melting of PCM in the metal foam pores within the capsule are simulated using the model. The model resolves the geometry of the individual pores in the metal foam and thus captures the local heat transfer between the metal foam and PCM, and the movement of PCM solid-liquid interface during melting inside each pore. Heat transfer from the HTF to the metal shell, metal foam, and PCM, and the resulting melting and energy storage characteristics are predicted by using the model. The effects of important geometrical parameters such as capsule size, capsule shell thickness, pore size distribution and porosity of the foam are studied. As a significant fraction of energy storage is in the form of sensible energy, the total energy storage with the variation of these parameters are quantitatively compared. For the range of parameters considered in the study, it is found that the increase in foam porosity from 50 % to 70 % increases the total energy storage by 5.41 % while increasing the average pore radius from 0.5 mm to 0.9 mm keeping the porosity 60 %, increases the total energy storage by only 1.54 %. Change in capsule inner diameter from 7 to 11 mm increases the total energy storage by 211.99 % although the energy stored per unit volume is reduced by 7.55 %. Similar effect is also observed for increase in shell thickness from 0.5 to 1.5 mm. � 2023 Elsevier Ltd
3D printing for functional tissue engineering
(2022) Pemmada R.; Telang V.S.; Dash M.; Charles Richard J.L.; Tandon P.; Ramakrishna S.; Nanda H.S.
Three-dimensional printing (3DP) or additive manufacturing (AM) has critical potential as a manufacturing strategy in fabricating functional scaffolds for tissue engineering and regenerative medicine. The 3DP has the capacity to create complex parts (scaffolds or tissue or organ) with the use of different biomaterials. This chapter will address the current 3D powder- and paste-based innovations utilized in tissue development and study the vivid biomaterials that are being researched. There are few prerequisites that should be tended to recreate the functional tissue, such as mechanical strength, porosity, cell aggregation, cell composition, and cell proliferation. This section of the book presents a cutting-edge investigation report of 3DP innovations for tissue engineering applications and the immediate 3DP developments of practically evaluated scaffolds. Innovative constraints will also be about to feature the chance of future upgrades for new 3DP strategies for tissue engineering. The ultimate aim of this review is to sum up the advances in 3DP of some kinds of tissues and present the most innovative bioinks to contemplate and examine the preferences and impediments of AM when utilized for printing a scaffold, tissue, and organ. � 2022 Elsevier Inc.
A 3D resolved-geometry model for unstructured and structured packed bed encapsulated phase change material system
(2022) Athawale V.; Jakhar A.; Jegatheesan M.; Rath P.; Bhattacharya A.
A 3D numerical model is developed to simulate melting in packed bed encapsulated phase change material (PCM) energy storage systems. The main novelty of the model is that it resolves the arrangement of capsules inside the system for both structured and unstructured packing and thus accurately captures the fluid flow, heat transfer and phase change in the capsules. To create the unstructured arrangement of capsules in the domain a novel dropping and rolling algorithm is implemented. The flow of heat transfer fluid (HTF) outside the capsules as well as the natural convection in the PCM within the capsules is also simulated. Initially, a single capsule study is performed, which shows that both natural convection inside the liquid PCM and forced convection outside the capsule affect the melting characteristics. Subsequently, the model is extended to simulate phase change in multiple capsules in a cubical domain arranged with structured and unstructured packing. The analysis of the effect of capsule arrangement on the melting and energy storage characteristics for both structured and unstructured packing of capsules is performed. Additionally, parametric studies are performed to analyze the effects of capsule size, fluid temperature, and fluid velocity for both types of systems. Simulation results show that the total melting time for unstructured packing is reduced on an average by 23.56% for the 2.5 mm capsules and by 10.14% for the 5 mm capsules as compared to structured packing. The effect of HTF temperature change is more prominent for structured cases, with an increase of 65.8% melting time as compared to 58.4% for the unstructured cases when the HTF temperature is reduced by 20 K. In contrast, the effect of velocity is less significant for the structured cases with a reduction of HTF velocity from 0.1 cm/s to 0.05 cm/s causing an increase of 27.3% melting time for the structured cases and 42.6% for the unstructured cases. The developed model can be used to capture the effect of different arrangements of capsules in encapsulated PCM energy storage systems and thus obtain effective designs for such systems. � 2022 Elsevier Ltd