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Please use this identifier to cite or link to this item: http://idr.iitbbs.ac.in/jspui/handle/2008/2497
Title: Run and slow control system of the Belle II silicon vertex detector
Authors: Irmler C.
Aihara H.
Aziz T.
Bacher S.
Bahinipati S.
Barberio E.
Baroncelli T.
Baroncelli T.
Basith A.K.
Batignani G.
Bauer A.
Behera P.K.
Bertacchi V.
Bettarini S.
Bhuyan B.
Bilka T.
Bosi F.
Bosisio L.
Bozek A.
Buchsteiner F.
Caria G.
Casarosa G.
Ceccanti M.
?ervenkov D.
Czank T.
Dash N.
De Nuccio M.
Dole�al Z.
Forti F.
Friedl M.
Gobbo B.
Grimaldo J.A.M.
Hara K.
Higuchi T.
Ishikawa A.
Jeon H.B.
Joo C.
Kaleta M.
Kandra J.
Kang K.H.
Kody� P.
Kohriki T.
Komarov I.
Kumar M.
Kumar R.
Kvasni?ka P.
La Licata C.
Lalwani K.
Lanceri L.
Lee J.Y.
Lee S.C.
Li Y.
Libby J.
Lueck T.
Mammini P.
Martini A.
Mayekar S.N.
Mohanty G.B.
Morii T.
Nakamura K.R.
Natkaniec Z.
Onuki Y.
Ostrowicz W.
Paladino A.
Paoloni E.
Park H.
Prasanth K.
Profeti A.
Rao K.K.
Rashevskaya I.
Resmi P.K.
Rizzo G.
Rozanska M.
Sahoo D.
Sasaki J.
Sato N.
Schultschik S.
Schwanda C.
Stypula J.
Suzuki J.
Tanaka S.
Tanigawa H.
Taylor G.N.
Thalmeier R.
Tsuboyama T.
Urquijo P.
Vitale L.
Wan K.
Watanabe M.
Watanuki S.
Watson I.J.
Webb J.
Wiechczynski J.
Williams S.
Yin H.
Zani L.
Belle-II SVD Collaboration
Keywords: Belle II
Belle II SVD
EPICS
Run control
Silicon vertex detector
Slow control
Issue Date: 2019
Abstract: The Belle II Silicon Vertex Detector (SVD) was installed recently and has been prepared for physics run at SuperKEKB factory, Tsukuba, Japan. For a reliable operation and data taking of the SVD, a sophisticated and robust run and slow control system has been implemented, which utilizes the Experimental Physics and Industrial Control System (EPICS) framework. EPICS uses client/server and publish/subscribe techniques to communicate between the various sub-systems and computers. The information exchange between the different pieces of software and computers is done by process variables (PVs). These PVs are provided by input/output controllers (IOCs), which communicate and interface with the hardware components. The Belle II SVD slow and run control comprises five groups of subsystems, which are SVD DAQ controller, Flash ADC controller, environmental monitors and interlocks, power supplies and EPICS infrastructure services. In this paper we describe the tasks and the implementation of the individual sub-systems, the interaction between them and the global Belle II run and slow control as well as the first experience from commissioning and initial operation of the SuperKEKB accelerator. � 2019
URI: http://dx.doi.org/10.1016/j.nima.2019.162706
http://10.10.32.48:8080/jspui/handle/2008/2497
Appears in Collections:Research Publications

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